BC rel and BNC rel are branches to the branch target if the carry is set or clear.BR rel is an absolute branch to the branch target.Sweet16 implements 13 of these operations, leaving three operations as NUL, while Sweet16c extends this to include 16 "op 0" operations:
SWEET16 WOZNIAK CODE
Most of these are followed by a signed 8bit operand which is treated as a sign-extended 16bit operand, and branch instructions work as in the 6502, with the branch relative to the location following the two byte branch code for a range of +129/-128 from the location of the branch instruction. If the high four bits of the Sweet16 code is 0, then the lower four bits indicate one of the 16 branch operations. POPD is a 16bit pre-decrement load from the address pointed to by the register.POP and STP ("STore Pop") are 8bit pre-decrement load from and store to the address pointed to by the register.LDD and STD are 16bit post-increment load from and store to the address pointed to by the register.LD and ST are 8bit post-increment load from and store to the address pointed to by the register.LD Rn and ST Rn are 16bit load and store between accumulator and the target register.CMP Rn is a two's complement subtract with 6502 inverted carry, which stores the result, and sets the result register status, to register 13.
ICR Rn and DCR Rn increment or decrement the register by one.SUB Rn has an inverted carry, like the 6502. ADD Rn and SUB Rn are two's complement add and subtract.SET Rn, word is an immediate load to a register of the following two bytes, in standard 6502 low byte first order.Register instructions include add and subtract, compare, immediate load, and a set of load and store instructions, and while ADD, SUB and CMP set the carry based on the result of the operation, all other register operations clear the carry:
There are 15 instructions which have the instruction code in the high four bits and the operand register in the low four bits, making for very compact code. In the original, the status information is in the high byte, but in this implementation, it is moved to the low byte, for easier implememtation of the 65C816 version. R15 is the instruction pointer, and a byte of R14 serving as the status register holding an index to the value of the last register operation and a carry bit. In Sweet16, 16 2-byte locations in Zero Page space are treated as two byte registers, R0-R15, with R0 serving as an accumulator and most register operations acting between R0 and the specified register. And Wozniak's Sweet16 makes a number of sacrifices of operating speed in order to achieve extremely (and extremely clever) compact code. Further, it is written for the original NMOS 6502 processor, while the CX16 will feature either the 65C02 or 65C816. However, while the original code for the Sweet16 is widely available, it is copyrighted Apple code. When the Sweet16 RTN instruction is executed, execution returns to the following 6502 code.ĭavid Murray (aka "The Eight Bit Guy") has mentioned an interest in including the Sweet16 VM on his CX16 "Dream Computer". It is embedded in 6502 code by making a call to the Sweet16 subroutine and then executing the following embedded Sweet16 code. "Sweet16" is Steve Wozniak's compact virtual machine for concisely handling 16bit data on the 6502 processor. A New, Open-Source implementation of Steve Wozniak's Sweet16 Virtual Machine for the 65C02/65C816.
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